Image sensors are semiconductor devices which can convert optical signals to electrical signals. Nowadays, the conventional image sensors include Charge-Coupled Device (CCD) image sensors and Complementary Metal Oxide Semiconductor (CMOS) image sensors.
Although both of the CCD image sensors and the CMOS image sensors use photodiodes to convert optical signals to electrical signals, they are formed by different processes and have different structures. After photoelectric conversion, the CCD image sensors apply alternating voltages on adjacent electrodes to form movable potential traps, so that photo induced charges generated at each pixel can be transferred to output ends for detecting. However, the COMS image sensors convert photo induced charges at each pixel into a voltage signal, and then a magnification driving operation and a decoding selecting operation are performed to the voltage signal, such that the photo induced charges generated at the corresponding pixel can be detected.
From an aspect of interface signals, the conventional CCD image sensors are passive devices. Peripheral circuits provide horizontal and vertical CCD drive signals and electronic shutter signals, and then receive image signals from CCD signal output ends. However, the conventional CMOS image sensors are active devices. Peripheral circuits are only used to set parameters, such as exposure time, amplifier gain, etc., through serial interfaces (typically, I2C or SPI). The CMOS image sensors would output image signals after the exposure time elapses. Accompanying with the image signals, synchronization signals for indicating beginnings and endings of the image signals are output, so that downstream chips can correctly receive the image signals.
CCD image sensors include linear CCD image sensors and array CCD image sensors, and the array CCD image sensors are used more widely. A structure diagram of a conventional array CCD image sensor is schematically illustrated in FIG. 1.
Referring to FIG. 1, the array CCD image sensor includes a photography area 10. The photography area 10 includes a plurality of pixel units 20 arranged in rows and columns. Each pixel unit 20 includes a photodiode 23 and a pair of electrodes 24.
FIGS. 2-4 illustrate various types of driving signals required in operations of the array CCD image sensor shown in FIG. 1. Specifically, FIG. 2 illustrates CCD vertical driving signals, FIG. 3 illustrates CCD horizontal driving signals, and FIG. 4 illustrates CCD readout driving signals.
Working processes of the array CCD image sensor shown in FIG. 1 include an exposure step (1), a transfer step (2) and a readout step (3).
In the exposure step (1), photoelectric conversion is performed in the photodiode 23 to convert photons to photo induced charges (e) and store the photo induced charges. Referring to S1 shown in FIG. 1, S1 stands for storage of the photo induced charges. The number of the photo induced charges is proportional to the intensity of the photons.
In the transfer step (2), referring to S21 (vertical transfer) shown in FIG. 1, the photo induced charges are transferred along an adjacent vertical CCD21 to complete vertical transfer under control of the CCD vertical driving signals (Vφ1˜Vφ4) shown in FIG. 2. Then, referring to S22 (horizontal transfer) shown in FIG. 1, the photo induced charges are transferred along a horizontal CCD22 under control of the horizontal driving signals (Hφ1˜Hφ2) shown in FIG. 3. Transfers of the photo induced charge package in the vertical CCD21 and the horizontal CCD22 depend on alternating voltage pulses (Vφ1˜Vφ4 and Hφ1˜Hφ2) applied on the CCD electrodes. The alternating voltage pulses form movable potential traps to transfer the photo induced charges.
In the readout step (3), an end of the horizontal CCD22 is connected with a detection circuit. The detection circuit converts the photo induced charge package transferred from the horizontal CCD22 to a voltage signal, and reads the voltage signal using a Correlated Double Sampling (CDS) method (referring to S3 shown in FIG. 3, wherein S3 stands for charge detection). Referring to FIG. 1, the detection circuit may include an amplifier Amp, which is used to read the voltage signal Vout under control of the driving signal φRG. Specifically, as shown in FIG. 4, VFD illustrates the waveform of the CCD signal output voltage, wherein A stands for a reference voltage, B stands for the signal voltage, and the difference between A and B stands for the luminance of the pixel.
FIG. 5 illustrates a structure diagram of a conventional CMOS image sensor. Referring to FIG. 5, signals of ax and ay respectively stand for row and column addresses being operated. There are a plurality of row address (ax), which can be decoded by a row decoder to obtain reset signals (RST0˜RSTi), transfer signals (TX0˜TXi) and readout strobe signals of each row. P(i, j) in the pixel array stands for a pixel in the ith row and the jth column. After generated in the pixel photodiodes, photo induced charges are converted to voltage signals, and the voltage signals are transferred to detection bit lines (BL0˜BLj) according to row strobe operations. Bit lines of all columns are connected with a column decoding and quantification module to perform quantification and row strobe operations, then Dout are output successively. The row strobe signal is obtained by decoding the column address ay.
FIG. 6 illustrates an operation timing diagram of the CMOS image sensor shown in FIG. 5. Typically, the conventional CMOS image sensor works row by row. Namely, in each row, firstly reset is performed, then comes to exposure, and finally read out is implemented.
Referring to FIG. 6, taking the first row as an example, R (1) stands for the reset operation before exposure. After a duration of exposure, Read (1) stands for the readout operation of the first row. R (2) stands for the reset operation before exposure of the second row, and Read (2) stands for the readout operation of the second row. R (3) stands for the reset operation before exposure of the third row, and Read (3) stands for the readout operation of the third row. The entire operation of the second row is shifted a row operation time period after the entire operation of the first row, and the operation of the third row is shifted the same row operation time period after the operation of the second row.
Specifically, when a reset operation is performed on the first row, timing diagrams of the reset signal RST1, the transfer signal TX1 and the readout strobe signal X1 are illustrated as 1A in FIG. 6. When a readout operation is performed on the first row, timing diagrams of the reset signal RST1, the transfer signal TX1 and the readout strobe signal X1 are illustrated as 1B in FIG. 6.
Referring to FIG. 6, timing diagrams of the reset signal RST2, the transfer signal TX2 and the readout strobe signal X2 for the reset operation of the second row are illustrated as 2A in FIG. 6. The same signals for the readout operation of the second row are illustrated as 2B in FIG. 6. Timing diagrams of the reset signal RST3, the transfer signal TX3 and the readout strobe signal X3 for the reset operation of the third row are illustrated as 3A in FIG. 6, and the same signals for the readout operation of the third row are illustrated as 3B in FIG. 6.
Moreover, the readout operation of each row includes a Correlated Double Sampling (CDS) process and an Analog to Digital Conversion (ADC) process. Specifically, referring to FIG. 7, the CDS process includes four steps of RST-SHR-TX-SHS, wherein RST stands for reset before readout, SHR stands for sampling a reset level after resetting a sampling point, TX stands for that charges are transferred to the sampling point, and SHS stands for sampling the signal level after the charges transferred. The difference between the two sampled levels represents the signal after the CDS process. Then, a quantification process is performed on each pixel signal. Pixel signal levels of each row are respectively quantified and read out through column decoding operations.
As shown above, the CCD image sensors and the CMOS image sensors have a great difference not only in structure but also in operation mode. Therefore, it is difficult to achieve compatibility between these two devices. Because of the great technology progress of CMOS image sensors, the CMOS image sensors have replaced the CCD image sensor in many applications. However, the replacement is limited to an overall replacement, rather than a compatible replacement. In some applications, the application environment and the processing system of the CCD image sensors have been fully optimized. The overall replacement is difficult to meet performance requirements, while the compatible replacement is more appropriate. However, there is still no CMOS image sensor which can be compatible with electrical signals of the CCD image sensor.